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1 e91912b95-te sony reserves the right to change products and specifications without prior notice. this information does not convey any licens e by any implication or otherwise under any patents or other right. application circuits shown, if any, are typical examples illustr ating the operation of the devices. sony cannot assume responsibility for any problems arising out of the use of these circuits. absolute maximum ratings (ta=25 c) ? supply voltage v cc 12 v ? storage temperature tstg C65 to +150 c ? allowable power dissipation p d 1200 mw operating conditions ? supply voltage v cc 4.0 to 10.0 v dv cc 3.5 to v cc v ? operating temperature topr C20 to +75 c description the CXA1352AS is a bipolar ic for graphic equalizer use. all controls are dc performed while the addition of single-potentiometers easily composes a 2-channel graphic equalizer. features ? microcomputer control possible ? built-in electronic volume ? built-in pseudo loudness function ? built-in balance function ? each channel corresponds to 5 elements ? 2 channels of fix out and line out pins applications graphic equalizer for cassette tape recorder with radio, mobile stereo and portable stereo structure bipolar silicon monolithic ic 2-channel 5 elements graphic equalizer ic 22 pin sdip (plastic) block diagram and pin configuration 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 graphic equalizer graphic equalizer bias volume volume control 14db 14db 29db 29db 1khz 400hz 100hz bal vol dc1 1n1 gnd line out1 out1 (fix) out1 (variable) 4khz 10khz dc2 in2 vg line out2 out2 (fix) out2 (variable) dv cc v cc iset CXA1352AS
2 CXA1352AS pin description pin symbol voltage i/o equivalent circuit description no. resistance 1 2 20 21 22 4 3 5 18 6 17 7 400 hz 100 hz 10 khz 4 khz 1 khz vol bal dc1 dc2 in1 in2 gnd dv cc 2 dv cc 2 v cc 2 v cc 2 gnd 60 k 60 k 25 k 1 2 4 2 0 2 1 2 2 d v c c v c c 1 0 k 1 4 7 4 0 k 2 0 k g n d d v c c v c c 9 k 1 4 7 4 0 k 2 0 k g n d 3 1 8 v c c 1 4 7 3 0 k g n d 5 6 1 7 v c c 1 4 7 5 0 k 5 0 k 1 k 5 k g n d 7 graphic equalizer control pin dc input volume control pin dc input balance control pin dc input connects the dc feedback capacitor of the lpf used in the 100 hz graphic equalizer signal input pin gnd pin
3 CXA1352AS pin symbol voltage i/o equivalent circuit description no. resistance 8 15 9 14 10 13 11 l out1 l out2 f out1 f out2 out1 out2 iset v cc 2 v cc 2 v cc 2 1.3 v 0 0 0 0 v c c 1 4 7 2 7 k 3 0 0 3 0 0 g n d 8 1 5 1 4 v c c 1 4 7 3 0 k 3 0 0 3 0 0 g n d 9 1 3 v c c 1 4 7 2 0 k 2 5 0 2 5 0 g n d 1 0 v c c 1 4 7 3 0 0 g n d 1 1 line output pin fix output pin electronic volume output pin reference current setting pin (for graphic equalizer) normally 160 k resistor is connected
4 CXA1352AS pin symbol voltage i/o equivalent circuit description no. resistance 12 16 19 vg v cc dv cc v cc 2 v cc dv cc 20 k 60 k v c c 1 4 7 4 0 k 4 0 k 3 0 0 g n d 1 2 3 0 0 v c c 1 6 v c c d v c c g n d 1 9 3 0 k 3 0 k 4 2 k signal reference voltage pin a capacitor is connected for ripple rejection power supply pin (operation) power supply pin (control)
5 CXA1352AS electrical characteristics (ta=25 c, v cc =8 v, dv cc =5 v) no. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 item supply voltage (operation) supply voltage (control) current consumption reference input level reference output level reference line output level reference fix output level graphic equalizer setting frequency (1) graphic equalizer setting frequency (2) graphic equalizer setting frequency (3) graphic equalizer setting frequency (4) graphic equalizer setting frequency (5) graphic equalizer frequency deviation maximum boost (1) maximum boost (2) maximum cut (1) maximum cut (2) total harmonic distortion volume attenuation (1) volume attenuation (2) balance adjustment (1) balance adjustment (2) noise level output offset voltage symbol v cc dv cc i cc v in v out v line v fix geq1 geq2 geq3 geq4 geq5 ? eq geqb1 geqb2 geqc1 geqc2 thd vol1 vol2 bal1 bal2 v nois v off test conditions graphic equalizer all flat, volume mid graphic equalizer all flat, volume max, f=1 khz f=1 khz graphic equalizer all flat, f=1 khz lpf cut off frequency (C3 db) bpf (1) central frequency bpf (2) central frequency bpf (3) central frequency hpf cut off frequency (C3 db) cut off frequency and central frequency deviation f=400 hz, 1 khz, 4 khz maximum boost f=100 hz, 10 khz maximum boost f=400 hz, 1 khz, 4khz maximum cut f=100 hz, 10 khz maximum cut r l =2 k , graphic equalizer all flat, volume max, f=1 khz, reference +10 db is input graphic equalizer all flat, volume max, f=1 khz graphic equalizer all flat, volume min, f=1 khz graphic equalizer all flat, bal=max,volume max, f=1khz graphic equalizer all flat, bal=min, volume max, f=1khz rg=5 k , graphic equalizer all flat, volume max, a wtg filter graphic equalizer all flat, volume max min. typ. max. unit 4.0 10.0 v 3.5 v cc v 8.0 12.0 16.0 ma C34.0 dbm C23.0 C20.0 C17.0 dbm C6.5 C4.5 C2.5 dbm C23.0 C20.0 C17.0 dbm 200 hz 400 hz 1.0 khz 4.0 khz 8.0 khz C20 0 20 % 9.0 11.2 14.0 db 8.0 10.7 14.0 db C13.0 C10.7 C8.5 db C12.0 C9.5 C7.0 db 0.25 1.0 % C1.5 0 1.5 db C94.4 C80.0 db 0 db C66 db C93.1 C88.0 db 3.5 4.0 4.5 v
6 CXA1352AS electrical characteristics test circuit 1 2 3 4 5 6 7 9 1 0 1 1 1 2 1 3 1 4 1 6 1 7 1 8 1 9 2 0 2 1 2 2 g n d p o w e r s u p p l y p o w e r s u p p l y d c v o l t m e t e r s 1 0 s 1 6 s 2 0 s 1 5 s 1 4 s 9 s 8 s 4 r 2 0 2 k r 1 6 2 0 k r 1 4 2 0 k r 1 2 5 . 1 k r 1 0 3 9 k r 1 9 2 0 k 1 k h z b p f s 1 9 s 1 8 d i n a u d i o a w t g n o i s e f i l t e r o u t s 1 7 i n f i l t e r s 1 3 s 1 2 s 1 1 a c v o l t m e t e r d i s t o r t i o n a n a l y z e r o s c i l l o s c o p e n o t e 1 . r e s i s t o r t o l e r a n c e 2 . c a p a c i t o r t o l e r a n c e c o u p l i n g c a p a c i t p r * 5 % 1 % * 5 % 2 % 1 0 % r 2 1 2 k r 1 8 2 0 k r 1 7 1 6 0 k r 1 5 2 0 k r 1 3 2 0 k s 3 s 7 s 6 s 5 c 1 8 4 . 7 / 2 5 v c 1 9 4 . 7 / 2 5 v c 1 6 4 . 7 / 2 5 v c 1 1 4 . 7 / 2 5 v c 1 7 4 . 7 / 2 5 v c 1 4 4 . 7 / 2 5 v c 1 5 4 . 7 / 2 5 v 8 1 5 * c 2 0 4 7 / 2 5 v * c 1 3 1 0 0 / 2 5 v * c 1 0 4 . 7 / 2 5 v * c 8 1 0 0 / 2 5 v * c 6 1 0 0 0 p * c 4 1 0 0 0 p * c 2 1 0 0 0 p * c 1 1 0 0 0 p * c 3 1 0 0 0 p * c 5 1 0 0 0 p * c 7 1 0 0 0 p * c 9 4 . 7 / 2 5 v c 1 2 4 . 7 / 2 5 v a s 2 b o o s t c u t b o o s t c u t b o o s t c u t b o o s t c u t b o o s t c u t c h 2 c h 1 m a x m i n r 7 5 0 k r 6 5 0 k r 5 5 0 k r 4 5 0 k r 3 5 0 k r 2 5 0 k r 1 5 0 k r 8 6 2 0 a u d i o s g r 9 3 9 k r 1 1 5 . 1 k s 1 c x a 1 3 5 2 a s 4 0 0 h z 1 0 0 h z b a l v o l 1 k h z 4 k h z 1 0 k h z d v c c d c 1 i n 1 g n d l o u t 1 f o u t 1 o u t 1 i s e t d c 2 i n 2 v c c l o u t 2 f o u t 2 o u t 2 v g
7 CXA1352AS application circuit 2 1 2 2 1 2 1 3 1 4 1 5 1 6 1 7 1 8 1 9 2 0 1 2 3 4 5 6 7 8 9 1 0 1 1 r 7 5 0 k r 6 5 0 k c 7 2 . 2 c 6 2 . 2 r 5 5 0 k c 5 2 . 2 r 4 5 0 k c 4 2 . 2 r 3 5 0 k c 3 2 . 2 r 2 5 0 k c 2 2 . 2 r 1 5 0 k c 1 2 . 2 c 9 4 . 7 c 1 1 4 . 7 c 1 4 2 . 2 c 1 6 2 . 2 c 1 8 2 . 2 r 1 0 1 6 0 k r 8 5 . 1 k g n d g n d g n d g n d g n d v c c g n d s i g n a l i n p u t s i g n a l i n p u t t o l i n e a m p l i f i e r t o l i n e a m p l i f i e r t o p o w e r a m p l i f i e r t o p o w e r a m p l i f i e r f o r s p e c t r u m a n a l y z e r d i s p l a y o r r e c o r d i n g t h r o u g h g r a p h i c e q u a l i z e r f o r s p e c t r u m a n a l y z e r d i s p l a y o r r e c o r d i n g t h r o u g h g r a p h i c e q u a l i z e r c x a 1 3 5 2 a s d v c c d v c c g n d g n d g n d g n d g n d c 8 2 2 0 c 1 0 4 . 7 c 1 2 4 . 7 c 1 3 2 2 0 c 1 5 2 . 2 c 1 7 2 . 2 c 1 9 2 . 2 c 2 0 4 . 7 r 9 5 . 1 k 4 0 0 h z 1 0 0 h z b a l v o l 1 k h z 4 k h z 1 0 k h z d v c c d c 1 i n 1 g n d l o u t 1 f o u t 1 o u t 1 i s e t d c 2 i n 2 v c c l o u t 2 f o u t 2 o u t 2 v g application circuits shown are typical examples illustrating the operation of the devices. sony cannot assume responsibility fo r any problems arising out of the use of these circuits or for any infringement of third party patent and other right due to same .
8 CXA1352AS description of operation 1. graphic equalizer ? conventional system fig. 1. fig. 1. indicates the conventional graphic equalizer system. this circuit performs boost and cut near f o controlled by the variable volume r v . (f o is resonance frequency determined by z (s) (formed lcr).) the operation can be seen as follows : when the lcr circuit goes to the far left of r v , a state of graphic equalizer becomes maximum cut. at that time, assuming transmittance as t (s), we have t (s) = z (s) z (s)+ r o here as z (s) = sl+r+ 1 sc then t (s) = lcs 2 +rcs+1 lcs 2 + (r+ro) cs+1 defining fo as f o = w o , w o as w o = 1 , and q as q = w ol , 2 lc r we can obtain the frequency characteristics at cut. also, when lcr circuit goes to the far right of r v , a state of graphic equalizer becomes maximum boost. at that time transmittance is : t (s) = z (s) +r o = lcs 2 + (r+ro) cs+1 z (s) lcs 2 +rcs+1 defining fo, w o and q as for cut, we can obtain the frequency characteristics at boost. v i r 1 r v r 2 r 0 = r 1 = r 2 v o o p e r a t i o n a l a m p l i f i e r b o o s t c u t l c z ( s ) r
9 CXA1352AS fig. 2. indicates frequency characteristics at boost and cut. fig. 2. ? CXA1352AS system fig. 3. the structure of the graphic equalizer used in this ic is shown on fig. 3. this circuit performs boost and cut controlled by 2 transconductance amplifiers that can vary the conversion coefficient through control currents ib, and ic around w o. ( w o is central frequency determined by band pass filter.) considering output impedance z (s) of gm1, gm2 we have z (s) = 1 h(s) ? gm1 r e s p o n s e ( d b ) 0 d b b o o s t f i a t c u t f o = 2 p l c 1 f r e q u e n c y ( h z ) f o v i h ( s ) = s 2 + s + w o 2 q w o s q w o h ( s ) i c i b z ( s ) z ( s ) r r g m 1 g m 2 v o o p e r a t i o n a l a m p l i f i e r
10 CXA1352AS here, using w o and q we can express bpf transmittance h (s) as z (s) = q s+ 1 + w o ? q w o ? gm1 gm1 gm1 ? s this formula shows that this system and the aforementioned lcr circuit have equivalent impedance characteristics on z (s). then, regarding gm as the maximum value of gm1 and gm2, the operation can be observed as follows. maximum cut occurs when gm1=gm and gm2=0. at that time we have transmittance t (s) as t (s) = z (s) = z (s) +r this is equal to the frequency characteristics of the conventional graphic equalizer at cut. also, maximum boost occurs when gm1=0 and gm2=gm. at that time we have transmittance t (s) as t (s) = z (s) +r = z (s) this is equal to the frequency characteristics of the conventional graphic equalizer at boost. we can then deduce that, as far as the operation is concerned the graphic equalizer on this ic and the conventional graphic equalizer are equal, even when the system differs. the merit in using this ics system rests with the fact that monolithic filter technology realizes a graphic equalizer without external parts. the structure of the actual graphic equalizer, including bpf, is shown on fig. 4. fig. 4 h (s) = w o ? s q s 2 + w o s + w o 2 q s 2 + w o ? s + w o 2 q s 2 + (1+r ? gm) ? w o 2 ? s+ w o 2 q s 2 + w o ? s + w o 2 q s 2 + (1+r ? gm) ? w o 2 ? s+ w o 2 q r 2 3 0 k s u m v o g m 4 g m 3 g m 1 i c u t i b o o s t g n d g n d g n d g n d g n d c 2 c 1 c 3 g m 2 v i v i 1 1 r 1 3 0 k
11 CXA1352AS 2. control through microcomputer possible volume, balance and the 100 hz, 400 hz, 1 khz, 4 khz, 10 khz boost, cut control respectively are all executed through dc voltage. also, the control voltage range is determined through dv cc (control power supply, independent from v cc ) and is from 0 v to dv cc . accordingly, the control range can be varied at will, by changing dv cc voltage. by setting dv cc 5 v, control through the microcomputer becomes possible. setting to dv cc =v cc enables usage with single power supply. 3. pseudo loudness a loudness function interlocking with volume (vol) is featured. with this ic, to provide a loudness effect, the 100 hz and 10 khz graphic equalizer part does not use a bpf but is composed of a low pass filter (lpf) and a high pass filter (hpf) respectively. the operation is explained as follows. as vol drops below the center, the 100 hz and 10 khz graphic equalizer part ib (see fig. 3.) gradually increases even if the graphic equalizer control pin (100 hz and 10 khz) is flat, boost applies and as a result loudness effect is obtained.
12 CXA1352AS notes on operation 1. power supply dv cc can be used independently from v cc but supply voltage should be v cc 3 dv cc , without fall. 2. pseudo loudness as mentioned in the paragraph on description of operation, as it is interlocked with vol, loudness can not be put off. 3. output pin this ic features 2 channels for each of out pin, line out pin and fix out pin. usage of the respective output pins is indicated as follows. ? out pin normally used as the graphic equalizer output. ? line out pin a sound from a source that has not passed through the graphic equalizer is only amplified and output from this pin. ? fix out pin this pin is useful for rec or spectrum analyzer display after the sound formation at the graphic equalizer. the relation between the input and the respective outputs is shown on fig. 5. fig. 5. 4. reference resistor to check the central frequency deviation of the graphic equalizer, the control current that determines the filter time constant is determined by means of an external, not an internal, resistor. this is the 160 k external resistor connected to iset pin (pin 11). accordingly, for the resistor to be connected to iset pin, it is recommended to use a resistor with excellent dispersion and temperature characteristics. also, by varying the value of the resistor connected to iset pin, the frequency characteristics of the graphic equalizer can be shifted. by reducing the resistor value the shift moves to the high band and by increasing the value the shift moves to the low band. however, 5 elements cannot be shifted independently. f o u t 2 0 d b m l o u t 5 d b m o u t 2 0 d b m ( v a r i a b l e ) v o l u m e i n a m p 3 4 d b m i n 1 4 d b l i n e a m p 2 9 d b g r a p h i c e q u a l i z e r g e b p f + g e h p f + g e l p f + s u m a m p
13 CXA1352AS example of representative characteristics 1 5 1 0 5 1 0 1 5 5 0 5 0 1 0 0 2 0 0 5 0 0 1 k 2 k 5 k 1 0 k 2 0 k f r e q u e n c y c h a r a c t e r l s t l c s a l l b o o s t a l l f l a t a l l c u t b o o s t c u t r e s p o n s e ( d b ) v c c = 8 v d v c c = 5 v 0 d b = 2 0 d b m , 1 k h z v o l : m a x f r e q u e n c y ( h z ) 4 8 4 0 5 0 1 0 0 2 0 0 5 0 0 1 k 2 k 5 k 1 0 k 2 0 k l o u d n e s s c h a r a c t e r i s t i c s 2 . 5 v b o o s t ( d b ) f r e q u e n c y ( h z ) v c c = 8 v d v c c = 5 v 0 d b = a t 1 k h z a l l f l a t v o l = 0 . 0 v 1 . 0 v 1 . 5 v 2 . 0 v 5 . 0 v
14 CXA1352AS t h d - o u t c h a r a c t e r i s t i c s ( a l l f l a t ) v c c = 8 v , d v c c = 5 v 0 d b = 2 0 d b m , v o l : m a x 1 0 . 0 5 . 0 2 . 0 1 . 0 0 . 5 0 . 2 0 . 1 0 . 0 5 t h d + n ( % ) 0 1 0 2 0 1 0 0 h z 1 0 k h z 1 k h z o u t p i n o u t p u t l e v e l ( d b ) t h d - o u t c h a r a c t e r i s t i c s ( a l l b o o s t ) v c c = 8 v , d v c c = 5 v 0 d b = 2 0 d b m v o l : m a x 1 0 . 0 5 . 0 2 . 0 1 . 0 0 . 5 0 . 2 0 . 1 0 . 0 5 t h d + n ( % ) 0 1 0 2 0 1 0 0 h z 1 0 k h z 1 k h z o u t p i n o u t p u t l e v e l ( d b ) t h d - o u t c h a r a c t e r i s t i c s ( a l l c u t ) v c c = 8 v , d v c c = 5 v 0 d b = 2 0 d b m , v o l : m a x 1 0 . 0 5 . 0 2 . 0 1 . 0 0 . 5 0 . 2 0 . 1 0 . 0 5 t h d + n ( % ) 0 1 0 2 0 1 0 0 h z 1 0 k h z 1 k h z o u t p i n o u t p u t l e v e l ( d b ) t h d - f o u t c h a r a c t e r i s t i c s ( a l l f l a t ) v c c = 8 v , d v c c = 5 v 0 d b = 2 0 d b m , v o l : m a x 1 0 . 0 5 . 0 2 . 0 1 . 0 0 . 5 0 . 2 0 . 1 0 . 0 5 t h d + n ( % ) 0 1 0 2 0 3 0 1 0 0 h z 1 0 k h z 1 k h z f i x o u t p i n o u t p u t l e v e l ( d b )
15 CXA1352AS t h d - f o u t c h a r a c t e r i s t i c s ( a l l b o o s t ) v c c = 8 v , d v c c = 5 v 0 d b = 2 0 d b m , v o l : m a x 1 0 . 0 5 . 0 2 . 0 1 . 0 0 . 5 0 . 2 0 . 1 0 . 0 5 t h d + n ( % ) 0 1 0 2 0 3 0 1 0 0 h z 1 0 k h z 1 k h z f i x o u t p i n o u t p u t l e v e l ( d b ) t h d - f o u t c h a r a c t e r i s t i c s ( a l l c u t ) v c c = 8 v , d v c c = 5 v 0 d b = 2 0 d b m , v o l : m a x 1 0 . 0 5 . 0 2 . 0 1 . 0 0 . 5 0 . 2 0 . 1 0 . 0 5 t h d + n ( % ) 0 1 0 2 0 1 0 0 h z 1 0 k h z 1 k h z f i x o u t p i n o u t p u t l e v e l ( d b ) t h d - l o u t c h a r a c t e r i s t i c s v c c = 8 v , d v c c = 5 v 0 d b = 6 d b m , v o l : m a x 1 0 . 0 5 . 0 2 . 0 1 . 0 0 . 5 0 . 2 0 . 1 0 . 0 5 t h d + n ( % ) 0 1 0 1 0 1 0 0 h z 1 0 k h z 1 k h z l i n e o u t p i n o u t p u t l e v e l ( d b ) o u t p u t v o l t a g e v s . c o n t r o l v o l t a g e ( v o l ) 0 2 0 4 0 6 0 8 0 o u t p i n o u t p u t l e v e l ( d b m ) 0 . 1 0 . 2 0 . 5 1 2 5 c o n t r o l v o l t a g e ( v ) v c c = 8 v d v c c = 5 v v i n = 1 4 d b m , 1 k h z a l l f l a t
16 CXA1352AS o u t p u t v o l t a g e v s . c o n t r o l v o l t a g e ( v o l ) 0 2 0 4 0 6 0 8 0 1 0 0 o u t p i n o u t p u t l e v e l ( d b m ) 0 1 . 0 2 . 0 3 . 0 4 . 0 5 . 0 c o n t r o l v o l t a g e ( v ) v c c = 8 v d v c c = 5 v v i n = 1 4 d b m , 1 k h z a l l f l a t o u t p u t v o l t a g e v s . c o n t r o l v o l t a g e ( v o l ) 1 0 0 8 0 6 0 4 0 2 0 0 o u t p i n o u t p u t l e v e l ( % ) 0 1 . 0 2 . 0 3 . 0 4 . 0 5 . 0 c o n t r o l v o l t a g e ( v ) v c c = 8 v d v c c = 5 v v i n = 1 4 d b m , 1 k h z 1 0 0 % = 0 d b m a l l f l a t
s o n y c o d e e i a j c o d e j e d e c c o d e p a c k a g e s t r u c t u r e m o l d i n g c o m p o u n d l e a d t r e a t m e n t l e a d m a t e r i a l p a c k a g e m a s s e p o x y r e s i n s o l d e r p l a t i n g c o p p e r a l l o y 2 2 p i n s d i p ( p l a s t i c ) s d i p - 2 2 p - 0 1 s d i p 0 2 2 - p - 0 3 0 0 0 . 9 5 g 1 . 7 7 8 1 1 1 2 1 2 2 1 9 . 2 0 . 1 + 0 . 4 7 . 6 2 6 . 4 0 . 1 + 0 . 3 0 . 2 5 0 . 0 5 + 0 . 1 0 t o 1 5 0 . 5 0 . 1 0 . 9 0 . 1 + 0 . 1 5 3 . 2 5 0 . 2 + 0 . 1 5 0 . 5 1 m i n 3 . 9 0 . 1 + 0 . 4 1 . a l l m a t s u r f a c e t y p e . t w o k i n d s o f p a c k a g e s u r f a c e : 2 . a l l m i r r o r s u r f a c e t y p e . package outline unit : mm CXA1352AS 17

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